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SD3078

C916255

SD3078 RTC with built-in crystal; I2C; 2.7V~5.5V; 0.8uA Iq; alarm output; backup power and battery charging; SRAM/NVRAM

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Datasheet or product page datasheet
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EasyEDA device easyeda device
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SOP-8-208mil easyeda footprint
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EasyEDA Pro device: C916255 easyeda pro device
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EasyEDA Pro library (device+symbol+footprint): C916255 easyeda pro lib
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engineering profile

SD3078

Identity

  • Manufacturer: WAVE(兴威帆电子)
  • Model / MPN: SD3078
  • LCSC: C916255
  • Category: rtc
  • Description: SD3078 RTC with built-in crystal; I2C; 2.7V~5.5V; 0.8uA Iq; alarm output; backup power and battery charging; SRAM/NVRAM
  • Source: EasyEDA/JLC verified common component seed
  • Project designators: Not project-specific
  • Project quantity per board: Not project-specific

Capabilities

  • i2c: interface

Package And Footprint

  • Package / footprint name: SOP-8-208mil
  • Pin count: 8
  • EasyEDA symbol UUID: 96e7b49687314cb8b46102ba352b4814
  • EasyEDA footprint UUID: b7f64850d83a4ecc93bd8bc90c02dbd1
  • EasyEDA device UUID: bc0ca8a9096c4789947269f98f25dc11
  • EasyEDA library UUID: 0819f05c4eef4c71ace90d822a990e87

Power And Operating Modes

  • Active current: EasyEDA property: 800nA.
  • Sleep / standby current: Not characterized in seed; extract sleep/standby current from datasheet tables.
  • Supply rails: EasyEDA property: 2.7V~5.5V.
  • Notes: Seed values are search hints only. Verify power modes, rail limits, startup requirements, and reference design passives from the datasheet.

Procurement Classification

  • JLC class: Extended Part
  • JLC note / assembly basis: EasyEDA/JLC verified common memory, timing, storage, and security seed
  • Assembly status: jlc_extended
  • Price-break table: Not captured in seed. Store only timestamped price-break snapshots when intentionally refreshed.
  • Live stock: intentionally not stored as durable selection data; refresh externally before ordering.

Datasheet And Links

Selection Notes

  • Good for: battery-backed timekeeping, scheduled wakeups, timestamped logs, and low-power systems that need wall-clock time
  • Avoid when: Not captured yet.
  • Known layout constraints: Verify package land pattern, decoupling requirements, thermal pad, RF keepouts, crystal routing, and boot straps from the datasheet.
  • Equivalent search hints: match category rtc, interfaces i2c, package SOP-8-208mil, and EasyEDA footprint UUID b7f64850d83a4ecc93bd8bc90c02dbd1.

Search Keywords

seed:common-memory-timing-security, source:easyeda-bridge, iot, common-pcb, storage, timing, security, sd3078, real-time-clock, i2c, battery-charging, temperature-compensated, rtc, sop-8-208mil, jlc-extended, jlc_extended, jlc-note:easyeda-jlc-verified-common-memory-timing-storage-and-security-seed, battery, power

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