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SS8550 Y2(RANGE:200-350)

C8542

PNP transistor, 1.5A, 25V, hFE=200~350, gain 200@100mA,1V, fT:100MHz

footprint
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assets
Datasheet or product page datasheet
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Datasheet PDF (mirrored) datasheet pdf
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EasyEDA 3D model easyeda 3d model
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EasyEDA device easyeda device
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SOT-23 easyeda footprint
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EasyEDA library easyeda library
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EasyEDA Pro device: C8542 easyeda pro device
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EasyEDA Pro library (device+symbol+footprint): C8542 easyeda pro lib
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EasyEDA symbol easyeda symbol
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JLC/LCSC product image jlc image
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JLC/LCSC product image jlc image
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3D model (OBJ) model 3d obj
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3D model (STEP) model 3d step
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engineering profile

SS8550 Y2(RANGE:200-350)

Identity

  • Manufacturer: CJ(江苏长电/长晶)
  • Model / MPN: SS8550 Y2(RANGE:200-350)
  • LCSC: C8542
  • Category: pnp-transistor
  • Description: PNP transistor, 1.5A, 25V, hFE=200~350, gain 200@100mA,1V, fT:100MHz
  • Source: EasyEDA/JLC verified common component seed
  • Project designators: Not project-specific
  • Project quantity per board: Not project-specific

Capabilities

  • Not captured yet.

Package And Footprint

  • Package / footprint name: SOT-23
  • Pin count: Unknown
  • EasyEDA symbol UUID: cdf761fe8c954c7c91b489f1caa40902
  • EasyEDA footprint UUID: 18f92042a8ba46109ed61a02a6753de7
  • EasyEDA device UUID: 092cec0121ae4cf39fe05b080c6ea16c
  • EasyEDA library UUID: 0819f05c4eef4c71ace90d822a990e87

Power And Operating Modes

  • Active current: Passive part; no quiescent current.
  • Sleep / standby current: Passive part; no quiescent current.
  • Supply rails: Application-defined.
  • Notes: Ratings are seeded from EasyEDA/LCSC properties when present; verify against datasheet for final design.

Procurement Classification

  • JLC class: Basic Part
  • JLC note / assembly basis: EasyEDA/JLC verified common passives and discretes seed
  • Assembly status: jlc_basic
  • Price-break table: Not captured in seed. Store only timestamped price-break snapshots when intentionally refreshed.
  • Live stock: intentionally not stored as durable selection data; refresh externally before ordering.

Datasheet And Links

Selection Notes

  • Good for: reuse when package, electrical ratings, footprint, and assembly class match the project constraints
  • Avoid when: Not captured yet.
  • Known layout constraints: Verify package land pattern, decoupling requirements, thermal pad, RF keepouts, crystal routing, and boot straps from the datasheet.
  • Equivalent search hints: match category pnp-transistor, interfaces none captured, package SOT-23, and EasyEDA footprint UUID 18f92042a8ba46109ed61a02a6753de7.

Search Keywords

seed:common-passives-discretes, source:easyeda-bridge, iot, common-pcb, ss8550, s8550, sot-23, pnp, pnp-transistor, jlc-basic, jlc_basic, jlc-note:easyeda-jlc-verified-common-passives-and-discretes-seed, power

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