FAN7392MX-JSM
Identity
- Manufacturer: JSMSEMI(杰盛微)
- Model / MPN: FAN7392MX-JSM
- LCSC: C7498958
- Category: half-bridge-gate-driver
- Description: 4A 700V half-bridge MOSFET/IGBT gate driver, 10V~20V, Low Side/High Side, 2 drivers, IOL/IOH:4A, rise 25ns, fall 17ns
- Source: EasyEDA/JLC verified common component seed
- Project designators: Not project-specific
- Project quantity per board: Not project-specific
Capabilities
- gpio: interface
- pwm: interface
Package And Footprint
- Package / footprint name: SOP-16-300mil
- Pin count: 16
- EasyEDA symbol UUID: 463362c4a767488092941a54cb196fb2
- EasyEDA footprint UUID: 987ee5752d7049f9bbdb0c15558bd123
- EasyEDA device UUID: c2cd9732a8ca4df29bf987b4fd4f240a
- EasyEDA library UUID: 0819f05c4eef4c71ace90d822a990e87
Power And Operating Modes
- Active current: Not characterized in seed; extract active current from datasheet tables.
- Sleep / standby current: Not characterized in seed; extract sleep/standby current from datasheet tables.
- Supply rails: EasyEDA property: 10V~20V.
- Notes: Seed values are search hints only. Verify power modes, rail limits, startup requirements, and reference design passives from the datasheet.
Procurement Classification
- JLC class: Extended Part
- JLC note / assembly basis: EasyEDA/JLC verified common drivers, isolation, and actuation seed
- Assembly status: jlc_extended
- Price-break table: Not captured in seed. Store only timestamped price-break snapshots when intentionally refreshed.
- Live stock: intentionally not stored as durable selection data; refresh externally before ordering.
Datasheet And Links
- Datasheet / product URL: https://item.szlcsc.com/datasheet/FAN7392MX-JSM/8573155.html
- Product URL: https://item.szlcsc.com/datasheet/FAN7392MX-JSM/8573155.html
- Datasheet-derived notes: Not extracted yet. Use PDF extraction to fill power modes, absolute maximums, pin functions, package variants, and reference design requirements.
Selection Notes
- Good for: reuse when package, electrical ratings, footprint, and assembly class match the project constraints
- Avoid when: Not captured yet.
- Known layout constraints: Verify package land pattern, decoupling requirements, thermal pad, RF keepouts, crystal routing, and boot straps from the datasheet.
- Equivalent search hints: match category
half-bridge-gate-driver, interfaces gpio, pwm, packageSOP-16-300mil, and EasyEDA footprint UUID987ee5752d7049f9bbdb0c15558bd123.
Search Keywords
seed:common-drivers-isolation-actuation, source:easyeda-bridge, iot, common-pcb, fan7392, high-side, low-side, half-bridge, 4a, mosfet-driver, half-bridge-gate-driver, sop-16-300mil, jlc-extended, gpio, pwm, jlc_extended, jlc-note:easyeda-jlc-verified-common-drivers-isolation-and-actuation-seed