SK6812MINI-C
Identity
- Manufacturer: 欧思科光电
- Model / MPN: SK6812MINI-C
- LCSC: C7423117
- Category: addressable-led
- Description: SK6812MINI-C 3.7V
5.5V Wavelength:R:615nm625nm;B:460nm470nm;G:520nm530nm Luminous Intensity:B:160mcd320mcd;R:280mcd515mcd;G:815mcd1275mcd Fixed-Frequency Pwm Mode:1kHz Voltage - Supply:3.7V5.5V Voltage - Supply:3.7V~5.5V Quiescent Current:0.65mA ESD Withstand Voltage:200 - Source: EasyEDA/JLC verified common component seed
- Project designators: Not project-specific
- Project quantity per board: Not project-specific
Capabilities
- gpio: interface
Package And Footprint
- Package / footprint name: SMD-4P,3.7x3.5mm
- Pin count: 4
- EasyEDA symbol UUID: 0e2f14cec44f41f4b6d4f0eea250b4b1
- EasyEDA footprint UUID: f561853f450348518338a579c89e27ed
- EasyEDA device UUID: 5705df8099004f46a7147e16098cfc6f
- EasyEDA library UUID: 0819f05c4eef4c71ace90d822a990e87
Power And Operating Modes
- Active current: Not characterized in seed; extract active current from datasheet tables.
- Sleep / standby current: Not characterized in seed; extract sleep/standby current from datasheet tables.
- Supply rails: EasyEDA property: 3.7V~5.5V.
- Notes: Seed values are search hints only. Verify power modes, rail limits, startup requirements, and reference design passives from the datasheet.
Procurement Classification
- JLC class: Extended Part
- JLC note / assembly basis: EasyEDA/JLC verified common board IO, power entry, and indicator expansion seed
- Assembly status: jlc_extended
- Price-break table: Not captured in seed. Store only timestamped price-break snapshots when intentionally refreshed.
- Live stock: intentionally not stored as durable selection data; refresh externally before ordering.
Datasheet And Links
- Datasheet / product URL: https://item.szlcsc.com/datasheet/SK6812MINI-C/8407590.html
- Product URL: https://item.szlcsc.com/datasheet/SK6812MINI-C/8407590.html
- Datasheet-derived notes: Not extracted yet. Use PDF extraction to fill power modes, absolute maximums, pin functions, package variants, and reference design requirements.
Selection Notes
- Good for: reuse when package, electrical ratings, footprint, and assembly class match the project constraints
- Avoid when: Not captured yet.
- Known layout constraints: Verify package land pattern, decoupling requirements, thermal pad, RF keepouts, crystal routing, and boot straps from the datasheet.
- Equivalent search hints: match category
addressable-led, interfaces gpio, packageSMD-4P,3.7x3.5mm, and EasyEDA footprint UUIDf561853f450348518338a579c89e27ed.
Search Keywords
seed:common-board-io-expansion, source:easyeda-bridge, iot, common-pcb, board-io, sk6812mini, rgb, addressable, status-led, one-wire, smd, addressable-led, smd-4p-3.7x3.5mm, jlc-extended, gpio, jlc_extended, jlc-note:easyeda-jlc-verified-common-board-io-power-entry-and-indicator-expansion-seed