XT25F128BSSIGT

Identity

Manufacturer: XTX(芯天下)
Model / MPN: XT25F128BSSIGT
LCSC: C558844
Category: flash-memory
Description: 128Mbit SPI Nor Quad I/O 2.7V~~3.6V SPI Interface:SPI Memory Size:128Mbit Clock Frequency:108MHz Voltage - Supply:2.7V~~3.6V Voltage - Supply:2.7V~3.6V Standby Supply Current:0.1uA Program / Erase Cycles:100,000 cycles Page Programming Time (Tpp):300us Block Erase Time(tBE):150ms@(32KB) Data Ret
Source: EasyEDA/JLC verified common component seed
Project designators: Not project-specific
Project quantity per board: Not project-specific

Capabilities

spi: interface

Package And Footprint

Package / footprint name: SOP-8-208mil
Pin count: 8
EasyEDA symbol UUID: 43bed985b5e14f2caab3913a3165fa5b
EasyEDA footprint UUID: 3d7987d6ea6d453187e9627f241abb76
EasyEDA device UUID: e8b715c5121e4745b4c602aa41a4adaa
EasyEDA library UUID: 0819f05c4eef4c71ace90d822a990e87

Power And Operating Modes

Active current: Not characterized in seed; extract active current from datasheet tables.
Sleep / standby current: Not characterized in seed; extract sleep/standby current from datasheet tables.
Supply rails: EasyEDA property: 2.7V~3.6V.
Notes: Seed values are search hints only. Verify power modes, rail limits, startup requirements, and reference design passives from the datasheet.

Procurement Classification

JLC class: Extended Part
JLC note / assembly basis: EasyEDA/JLC verified common memory, timing, storage, and security seed
Assembly status: jlc_extended
Price-break table: Not captured in seed. Store only timestamped price-break snapshots when intentionally refreshed.
Live stock: intentionally not stored as durable selection data; refresh externally before ordering.

Datasheet And Links

Datasheet / product URL: https://item.szlcsc.com/datasheet/XT25F128BSSIGT/582433.html
Product URL: https://item.szlcsc.com/datasheet/XT25F128BSSIGT/582433.html
Datasheet-derived notes: Not extracted yet. Use PDF extraction to fill power modes, absolute maximums, pin functions, package variants, and reference design requirements.

Selection Notes

Good for: external firmware storage, OTA staging, logs, filesystems, fonts, assets, and calibration blobs over SPI/QSPI
Avoid when: Not captured yet.
Known layout constraints: Verify package land pattern, decoupling requirements, thermal pad, RF keepouts, crystal routing, and boot straps from the datasheet.
Equivalent search hints: match category flash-memory, interfaces spi, package SOP-8-208mil, and EasyEDA footprint UUID 3d7987d6ea6d453187e9627f241abb76.

Search Keywords

seed:common-memory-timing-security, source:easyeda-bridge, iot, common-pcb, storage, timing, security, xt25f128, spi-nor, 128mbit, xtx, sop-8-208mil, flash-memory, jlc-extended, spi, jlc_extended, jlc-note:easyeda-jlc-verified-common-memory-timing-storage-and-security-seed