74LVC1G08GS,132

Identity

• Manufacturer: Nexperia(安世)
• Model / MPN: 74LVC1G08GS,132
• LCSC: C548225
• Category: logic-gate
• Description: 74LVC1G08GS,132 1.65V5.5V Logic Type:AND Gate Number of Channels:1 Voltage - Supply:1.65V5.5V Voltage - Supply:1.65V5.5V Quiescent Current:4uA Current - Output Low(IOL):32mA Current - Output High(IOH):32mA Input Logic Level - High:1.7V2V Input Logic Level - High:1.7V~2V Input L
• Source: EasyEDA/JLC verified common component seed
• Project designators: Not project-specific
• Project quantity per board: Not project-specific

Capabilities

• gpio: interface

Package And Footprint

• Package / footprint name: XSON-6(1x1)
• Pin count: Unknown
• EasyEDA symbol UUID: 918714f1bf1f48769e638e8641e15ed9
• EasyEDA footprint UUID: 184eede185ca4aa0b47ab0caa23a5681
• EasyEDA device UUID: 47e4337ffc7e48be9c7daab7126da72e
• EasyEDA library UUID: 0819f05c4eef4c71ace90d822a990e87

Power And Operating Modes

• Active current: Not characterized in seed; extract active current from datasheet tables.
• Sleep / standby current: Not characterized in seed; extract sleep/standby current from datasheet tables.
• Supply rails: EasyEDA property: 1.65V~5.5V.
• Notes: Seed values are search hints only. Verify power modes, rail limits, startup requirements, and reference design passives from the datasheet.

Procurement Classification

• JLC class: Extended Part
• JLC note / assembly basis: EasyEDA/JLC verified common logic, level-shifting, bus-interface, and analog-switch seed
• Assembly status: jlc_extended
• Price-break table: Not captured in seed. Store only timestamped price-break snapshots when intentionally refreshed.
• Live stock: intentionally not stored as durable selection data; refresh externally before ordering.

Datasheet And Links

• Datasheet / product URL: https://item.szlcsc.com/datasheet/74LVC1G08GS%252C132/569293.html
• Product URL: https://item.szlcsc.com/datasheet/74LVC1G08GS%252C132/569293.html
• Datasheet-derived notes: Not extracted yet. Use PDF extraction to fill power modes, absolute maximums, pin functions, package variants, and reference design requirements.

Selection Notes

• Good for: small glue logic, signal qualification, enable gating, reset/boot strap logic, and simple digital interlocks
• Avoid when: Not captured yet.
• Known layout constraints: Verify package land pattern, decoupling requirements, thermal pad, RF keepouts, crystal routing, and boot straps from the datasheet.
• Equivalent search hints: match category logic-gate, interfaces gpio, package XSON-6(1x1), and EasyEDA footprint UUID 184eede185ca4aa0b47ab0caa23a5681.

Search Keywords

seed:common-logic-interface-glue, source:easyeda-bridge, iot, common-pcb, logic, interface, glue, 74lvc1g08, single-and, tiny-logic, logic-gate, xson-6-1x1, jlc-extended, gpio, jlc_extended, jlc-note:easyeda-jlc-verified-common-logic-level-shifting-bus-interface-and-analog-switch-seed