JXT-PM1.27-2X5P-A1
Identity
- Manufacturer: JXTCONN(聚兴泰)
- Model / MPN: JXT-PM1.27-2X5P-A1
- LCSC: C54803375
- Category: debug-header
- Description: 2x5P through-hole debug header, 1.27mm pitch, 1.27mm row spacing, 10P, square holes, top entry, 1A, 4.3mm insulation height.
- Source: EasyEDA/JLC verified common component seed
- Project designators: Not project-specific
- Project quantity per board: Not project-specific
Capabilities
- gpio: interface
Package And Footprint
- Package / footprint name: 插件,P=1.27mm
- Pin count: Unknown
- EasyEDA symbol UUID: bb9d167b19714a7fb089429cb4c71ee4
- EasyEDA footprint UUID: b9e3cec5c2c44995bdf3b59734f305ab
- EasyEDA device UUID: df1f8b8f52d04fa3aa9f46bd00940f4b
- EasyEDA library UUID: 0819f05c4eef4c71ace90d822a990e87
Power And Operating Modes
- Active current: Passive part; no quiescent current.
- Sleep / standby current: Passive part; no quiescent current.
- Supply rails: Application-defined.
- Notes: Ratings are seeded from EasyEDA/LCSC properties when present; verify against datasheet for final design.
Procurement Classification
- JLC class: Extended Part
- JLC note / assembly basis: EasyEDA/JLC verified common debug headers, FPC/mezzanine connectors, field wiring terminals, and fuse seed
- Assembly status: jlc_extended
- Price-break table: Not captured in seed. Store only timestamped price-break snapshots when intentionally refreshed.
- Live stock: intentionally not stored as durable selection data; refresh externally before ordering.
Datasheet And Links
- Datasheet / product URL: https://item.szlcsc.com/datasheet/JXT-PM1.27-2X5P-A1/58256509.html
- Product URL: https://item.szlcsc.com/datasheet/JXT-PM1.27-2X5P-A1/58256509.html
- Datasheet-derived notes: Not extracted yet. Use PDF extraction to fill power modes, absolute maximums, pin functions, package variants, and reference design requirements.
Selection Notes
- Good for: SWD, JTAG, UART, programming, boundary-scan, bring-up, and production-test access headers
- Avoid when: Not captured yet.
- Known layout constraints: Verify package land pattern, decoupling requirements, thermal pad, RF keepouts, crystal routing, and boot straps from the datasheet.
- Equivalent search hints: match category
debug-header, interfaces gpio, package插件,P=1.27mm, and EasyEDA footprint UUIDb9e3cec5c2c44995bdf3b59734f305ab.
Search Keywords
seed:common-debug-mezzanine-field-wiring, source:easyeda-bridge, iot, common-pcb, debug, mezzanine, field-wiring, 1.27mm, 2x5, swd, jtag, through-hole, debug-header, p-1.27mm, jlc-extended, gpio, jlc_extended, jlc-note:easyeda-jlc-verified-common-debug-headers-fpc-mezzanine-connectors-field-wiring-terminals-and-fuse-seed