74HC125D,653-JSM

Identity

• Manufacturer: JSMSEMI(杰盛微)
• Model / MPN: 74HC125D,653-JSM
• LCSC: C53114416
• Category: tri-state-buffer
• Description: 74HC125D,653-JSM 2V6V Input type:- output type:Tri-State Voltage - Supply:2V6V Voltage - Supply:2V~6V Number of Elements:1 Number of Bits per Element:1 Channel Type:Unidirectional Current - Output Low(IOL):- Current - Output High(IOH):- Logic Family:74HC Operating Temperature
• Source: EasyEDA/JLC verified common component seed
• Project designators: Not project-specific
• Project quantity per board: Not project-specific

Capabilities

• gpio: interface

Package And Footprint

• Package / footprint name: SOP-14
• Pin count: 14
• EasyEDA symbol UUID: 8fcb809c9f164b129f73e4bea8202863
• EasyEDA footprint UUID: 22d47f71131b4caa93471c3bc809ead3
• EasyEDA device UUID: 7ef6d5cfc163406a8340db7c177c0588
• EasyEDA library UUID: 0819f05c4eef4c71ace90d822a990e87

Power And Operating Modes

• Active current: Not characterized in seed; extract active current from datasheet tables.
• Sleep / standby current: Not characterized in seed; extract sleep/standby current from datasheet tables.
• Supply rails: EasyEDA property: 2V~6V.
• Notes: Seed values are search hints only. Verify power modes, rail limits, startup requirements, and reference design passives from the datasheet.

Procurement Classification

• JLC class: Extended Part
• JLC note / assembly basis: EasyEDA/JLC verified common logic, level-shifting, bus-interface, and analog-switch seed
• Assembly status: jlc_extended
• Price-break table: Not captured in seed. Store only timestamped price-break snapshots when intentionally refreshed.
• Live stock: intentionally not stored as durable selection data; refresh externally before ordering.

Datasheet And Links

• Datasheet / product URL: https://item.szlcsc.com/datasheet/74HC125D%252C653-JSM/56091405.html
• Product URL: https://item.szlcsc.com/datasheet/74HC125D%252C653-JSM/56091405.html
• Datasheet-derived notes: Not extracted yet. Use PDF extraction to fill power modes, absolute maximums, pin functions, package variants, and reference design requirements.

Selection Notes

• Good for: shared digital buses, output-enable isolation, level-safe fanout, and selectable signal drive
• Avoid when: Not captured yet.
• Known layout constraints: Verify package land pattern, decoupling requirements, thermal pad, RF keepouts, crystal routing, and boot straps from the datasheet.
• Equivalent search hints: match category tri-state-buffer, interfaces gpio, package SOP-14, and EasyEDA footprint UUID 22d47f71131b4caa93471c3bc809ead3.

Search Keywords

seed:common-logic-interface-glue, source:easyeda-bridge, iot, common-pcb, logic, interface, glue, 74hc125, quad-buffer, three-state, output-enable, tri-state-buffer, sop-14, jlc-extended, gpio, jlc_extended, jlc-note:easyeda-jlc-verified-common-logic-level-shifting-bus-interface-and-analog-switch-seed