KH-1.27PH180-2X5P-L7.2-SMT
Identity
- Manufacturer: kinghelm(金航标)
- Model / MPN: KH-1.27PH180-2X5P-L7.2-SMT
- LCSC: C4943297
- Category: debug-header
- Description: KH-1.27PH180-2X5P-L7.2-SMT 2x5P 1.27mm vertical SMT pin header; row spacing 1.27mm; 10P; 1A; mating pin 4mm; insulator 1mm
- Source: EasyEDA/JLC verified common component seed
- Project designators: Not project-specific
- Project quantity per board: Not project-specific
Capabilities
- gpio: interface
Package And Footprint
- Package / footprint name: SMD,P=1.27mm
- Pin count: Unknown
- EasyEDA symbol UUID: 0901d5ed954b48de9c4b70b1c8395373
- EasyEDA footprint UUID: 356cccd286c24df5b946235eab56a4f4
- EasyEDA device UUID: 93d3f76c221e46b4a17176ffa06dfc89
- EasyEDA library UUID: 0819f05c4eef4c71ace90d822a990e87
Power And Operating Modes
- Active current: Passive part; no quiescent current.
- Sleep / standby current: Passive part; no quiescent current.
- Supply rails: Application-defined.
- Notes: Ratings are seeded from EasyEDA/LCSC properties when present; verify against datasheet for final design.
Procurement Classification
- JLC class: Extended Part
- JLC note / assembly basis: EasyEDA/JLC verified common debug headers, FPC/mezzanine connectors, field wiring terminals, and fuse seed
- Assembly status: jlc_extended
- Price-break table: Not captured in seed. Store only timestamped price-break snapshots when intentionally refreshed.
- Live stock: intentionally not stored as durable selection data; refresh externally before ordering.
Datasheet And Links
- Datasheet / product URL: https://item.szlcsc.com/datasheet/KH-1.27PH180-2X5P-L7.2-SMT/5516455.html
- Product URL: https://item.szlcsc.com/datasheet/KH-1.27PH180-2X5P-L7.2-SMT/5516455.html
- Datasheet-derived notes: Not extracted yet. Use PDF extraction to fill power modes, absolute maximums, pin functions, package variants, and reference design requirements.
Selection Notes
- Good for: SWD, JTAG, UART, programming, boundary-scan, bring-up, and production-test access headers
- Avoid when: Not captured yet.
- Known layout constraints: Verify package land pattern, decoupling requirements, thermal pad, RF keepouts, crystal routing, and boot straps from the datasheet.
- Equivalent search hints: match category
debug-header, interfaces gpio, packageSMD,P=1.27mm, and EasyEDA footprint UUID356cccd286c24df5b946235eab56a4f4.
Search Keywords
seed:common-debug-mezzanine-field-wiring, source:easyeda-bridge, iot, common-pcb, debug, mezzanine, field-wiring, 1.27mm, 2x5, swd, jtag, smt, 10-pin, debug-header, smd-p-1.27mm, jlc-extended, gpio, jlc_extended, jlc-note:easyeda-jlc-verified-common-debug-headers-fpc-mezzanine-connectors-field-wiring-terminals-and-fuse-seed