TXS0102VQDCURQ1
Identity
- Manufacturer: TI(德州仪器)
- Model / MPN: TXS0102VQDCURQ1
- LCSC: C42349189
- Category: level-shifter
- Description: TXS0102VQDCURQ1
- Source: EasyEDA/JLC verified common component seed
- Project designators: Not project-specific
- Project quantity per board: Not project-specific
Capabilities
- gpio: interface
Package And Footprint
- Package / footprint name: SSOP-8
- Pin count: 8
- EasyEDA symbol UUID: 71b6737008494d8f9d5a15d5b6af8687
- EasyEDA footprint UUID: 0f9521dc76a2414aa4c02edb0f5ca237
- EasyEDA device UUID: b2398d4b148a4dd2982ed3d7d828bf67
- EasyEDA library UUID: 0819f05c4eef4c71ace90d822a990e87
Power And Operating Modes
- Active current: Not characterized in seed; extract active current from datasheet tables.
- Sleep / standby current: Not characterized in seed; extract sleep/standby current from datasheet tables.
- Supply rails: Not characterized in seed; capture allowed supply rail range from datasheet.
- Notes: Seed values are search hints only. Verify power modes, rail limits, startup requirements, and reference design passives from the datasheet.
Procurement Classification
- JLC class: Extended Part
- JLC note / assembly basis: EasyEDA/JLC verified common logic, level-shifting, bus-interface, and analog-switch seed
- Assembly status: jlc_extended
- Price-break table: Not captured in seed. Store only timestamped price-break snapshots when intentionally refreshed.
- Live stock: intentionally not stored as durable selection data; refresh externally before ordering.
Datasheet And Links
- Datasheet / product URL: https://item.szlcsc.com/datasheet/TXS0102VQDCURQ1/44217795.html
- Product URL: https://item.szlcsc.com/datasheet/TXS0102VQDCURQ1/44217795.html
- Datasheet-derived notes: Not extracted yet. Use PDF extraction to fill power modes, absolute maximums, pin functions, package variants, and reference design requirements.
Selection Notes
- Good for: reuse when package, electrical ratings, footprint, and assembly class match the project constraints
- Avoid when: Not captured yet.
- Known layout constraints: Verify package land pattern, decoupling requirements, thermal pad, RF keepouts, crystal routing, and boot straps from the datasheet.
- Equivalent search hints: match category
level-shifter, interfaces gpio, packageSSOP-8, and EasyEDA footprint UUID0f9521dc76a2414aa4c02edb0f5ca237.
Search Keywords
seed:common-logic-interface-glue, source:easyeda-bridge, iot, common-pcb, logic, interface, glue, txs0102-q1, 2-bit, auto-direction, bidirectional, voltage-translation, automotive, level-shifter, ssop-8, jlc-extended, gpio, jlc_extended, jlc-note:easyeda-jlc-verified-common-logic-level-shifting-bus-interface-and-analog-switch-seed