TLV75533PDBVR

Identity

• Manufacturer: TI(德州仪器)
• Model / MPN: TLV75533PDBVR
• LCSC: C404027
• Category: ldo-regulator
• Description: 3.3V 500mA 5.5V 5.5V Output Configuration:Positive Voltage - Supply:5.5V Output Voltage:3.3V Output Voltage:3.3V Output Current:500mA Power Supply Rejection Ratio (PSRR):46dB@(100kHz) Voltage Dropout:238mV@(500mA) standby current:25uA Noise:71.5uVrms Features:Enable control；O
• Source: EasyEDA/JLC verified common component seed
• Project designators: Not project-specific
• Project quantity per board: Not project-specific

Capabilities

• Not captured yet.

Package And Footprint

• Package / footprint name: SOT-23-5
• Pin count: 5
• EasyEDA symbol UUID: ca6a5b01f0364de4bcd477786457f264
• EasyEDA footprint UUID: 3962fa5424e54dde8cfd30751ab1c7e4
• EasyEDA device UUID: d082ce6261444851b1bfff105e4e4ae5
• EasyEDA library UUID: 0819f05c4eef4c71ace90d822a990e87

Power And Operating Modes

• Active current: Not characterized in seed; extract active current from datasheet tables.
• Sleep / standby current: Not characterized in seed; extract sleep/standby current from datasheet tables.
• Supply rails: EasyEDA property: 5.5V.
• Notes: Seed values are search hints only. Verify power modes, rail limits, startup requirements, and reference design passives from the datasheet.

Procurement Classification

• JLC class: Extended Part
• JLC note / assembly basis: EasyEDA/JLC verified common power, analog, and interface IC seed
• Assembly status: jlc_extended
• Price-break table: Not captured in seed. Store only timestamped price-break snapshots when intentionally refreshed.
• Live stock: intentionally not stored as durable selection data; refresh externally before ordering.

Datasheet And Links

• Datasheet / product URL: https://www.ti.com/cn/lit/ds/symlink/tlv755p.pdf
• Product URL: https://www.ti.com/cn/lit/ds/symlink/tlv755p.pdf
• Datasheet-derived notes: Not extracted yet. Use PDF extraction to fill power modes, absolute maximums, pin functions, package variants, and reference design requirements.

Selection Notes

• Good for: power-tree designs when ratings and layout constraints fit
• Avoid when: Not captured yet.
• Known layout constraints: Verify package land pattern, decoupling requirements, thermal pad, RF keepouts, crystal routing, and boot straps from the datasheet.
• Equivalent search hints: match category ldo-regulator, interfaces none captured, package SOT-23-5, and EasyEDA footprint UUID 3962fa5424e54dde8cfd30751ab1c7e4.

Search Keywords

seed:common-power-analog-interface, source:easyeda-bridge, iot, common-pcb, tlv75533, 3.3v, 500ma, low-iq, enable, ldo-regulator, sot-23-5, jlc-extended, jlc_extended, jlc-note:easyeda-jlc-verified-common-power-analog-and-interface-ic-seed, power