IRS2003STRPBF
Identity
- Manufacturer: Infineon(英飞凌)
- Model / MPN: IRS2003STRPBF
- LCSC: C40009
- Category: half-bridge-gate-driver
- Description: IRS half-bridge rectifier driver, 10V~20V, IGBT/MOSFET, 2 drivers, IOL:600mA, IOH:290mA, rise 70ns, fall 35ns, tpLH:680ns
- Source: EasyEDA/JLC verified common component seed
- Project designators: Not project-specific
- Project quantity per board: Not project-specific
Capabilities
- gpio: interface
- pwm: interface
Package And Footprint
- Package / footprint name: SOP-8
- Pin count: 8
- EasyEDA symbol UUID: 4e31e9afe7304646a7e0f0bebfbbdc5e
- EasyEDA footprint UUID: 174bfc4e122a41b38a4ff8ccea33a462
- EasyEDA device UUID: ec5d7bd7bd0b4959b0799aa0ab5db7da
- EasyEDA library UUID: 0819f05c4eef4c71ace90d822a990e87
Power And Operating Modes
- Active current: Not characterized in seed; extract active current from datasheet tables.
- Sleep / standby current: Not characterized in seed; extract sleep/standby current from datasheet tables.
- Supply rails: EasyEDA property: 10V~20V.
- Notes: Seed values are search hints only. Verify power modes, rail limits, startup requirements, and reference design passives from the datasheet.
Procurement Classification
- JLC class: Extended Part
- JLC note / assembly basis: EasyEDA/JLC verified common drivers, isolation, and actuation seed
- Assembly status: jlc_extended
- Price-break table: Not captured in seed. Store only timestamped price-break snapshots when intentionally refreshed.
- Live stock: intentionally not stored as durable selection data; refresh externally before ordering.
Datasheet And Links
- Datasheet / product URL: https://item.szlcsc.com/datasheet/IRS2003STRPBF/40991.html
- Product URL: https://item.szlcsc.com/datasheet/IRS2003STRPBF/40991.html
- Datasheet-derived notes: Not extracted yet. Use PDF extraction to fill power modes, absolute maximums, pin functions, package variants, and reference design requirements.
Selection Notes
- Good for: reuse when package, electrical ratings, footprint, and assembly class match the project constraints
- Avoid when: Not captured yet.
- Known layout constraints: Verify package land pattern, decoupling requirements, thermal pad, RF keepouts, crystal routing, and boot straps from the datasheet.
- Equivalent search hints: match category
half-bridge-gate-driver, interfaces gpio, pwm, packageSOP-8, and EasyEDA footprint UUID174bfc4e122a41b38a4ff8ccea33a462.
Search Keywords
seed:common-drivers-isolation-actuation, source:easyeda-bridge, iot, common-pcb, irs2003, high-side, low-side, half-bridge, mosfet-driver, half-bridge-gate-driver, sop-8, jlc-extended, gpio, pwm, jlc_extended, jlc-note:easyeda-jlc-verified-common-drivers-isolation-and-actuation-seed