GD25Q128ESIGR

Identity

Manufacturer: GigaDevice(兆易创新)
Model / MPN: GD25Q128ESIGR
LCSC: C2928891
Category: flash-memory
Description: Dual/quad serial flash memory, 2.7V~3.6V, SPI, 128Mbit, 133MHz, standby 14uA, 100,000 cycles, Tpp:500us, tBE:150ms@(32KB)
Source: EasyEDA/JLC verified common component seed
Project designators: Not project-specific
Project quantity per board: Not project-specific

Capabilities

spi: interface

Package And Footprint

Package / footprint name: SOP-8-208mil
Pin count: 8
EasyEDA symbol UUID: 8ebf05efbc2745668235db2c737c94fb
EasyEDA footprint UUID: 3d7987d6ea6d453187e9627f241abb76
EasyEDA device UUID: 915fa230a38b4545aa1201de3c261c3b
EasyEDA library UUID: 0819f05c4eef4c71ace90d822a990e87

Power And Operating Modes

Active current: Not characterized in seed; extract active current from datasheet tables.
Sleep / standby current: Not characterized in seed; extract sleep/standby current from datasheet tables.
Supply rails: EasyEDA property: 2.7V~3.6V.
Notes: Seed values are search hints only. Verify power modes, rail limits, startup requirements, and reference design passives from the datasheet.

Procurement Classification

JLC class: Extended Part
JLC note / assembly basis: EasyEDA/JLC verified common memory, timing, storage, and security seed
Assembly status: jlc_extended
Price-break table: Not captured in seed. Store only timestamped price-break snapshots when intentionally refreshed.
Live stock: intentionally not stored as durable selection data; refresh externally before ordering.

Datasheet And Links

Datasheet / product URL: https://item.szlcsc.com/datasheet/GD25Q128ESIGR/3260959.html
Product URL: https://item.szlcsc.com/datasheet/GD25Q128ESIGR/3260959.html
Datasheet-derived notes: Not extracted yet. Use PDF extraction to fill power modes, absolute maximums, pin functions, package variants, and reference design requirements.

Selection Notes

Good for: external firmware storage, OTA staging, logs, filesystems, fonts, assets, and calibration blobs over SPI/QSPI
Avoid when: Not captured yet.
Known layout constraints: Verify package land pattern, decoupling requirements, thermal pad, RF keepouts, crystal routing, and boot straps from the datasheet.
Equivalent search hints: match category flash-memory, interfaces spi, package SOP-8-208mil, and EasyEDA footprint UUID 3d7987d6ea6d453187e9627f241abb76.

Search Keywords

seed:common-memory-timing-security, source:easyeda-bridge, iot, common-pcb, storage, timing, security, gd25q128, spi-nor, 128mbit, gigadevice, sop-8-208mil, flash-memory, jlc-extended, spi, jlc_extended, jlc-note:easyeda-jlc-verified-common-memory-timing-storage-and-security-seed