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BM8563ESA

C269877

I2C real-time clock/calendar, 1.2V~5.5V, 500nA supply, external crystal, alarm output, -40°C~+85°C, Iq:0.5uA

footprint
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assets
Datasheet or product page datasheet
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Datasheet PDF (mirrored) datasheet pdf
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EasyEDA 3D model easyeda 3d model
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EasyEDA device easyeda device
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SOP-8 easyeda footprint
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EasyEDA library easyeda library
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EasyEDA Pro device: C269877 easyeda pro device
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EasyEDA Pro library (device+symbol+footprint): C269877 easyeda pro lib
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EasyEDA symbol easyeda symbol
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JLC/LCSC product image jlc image
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engineering profile

BM8563ESA

Identity

  • Manufacturer: GATEMODE(捷茂微)
  • Model / MPN: BM8563ESA
  • LCSC: C269877
  • Category: rtc
  • Description: I2C real-time clock/calendar, 1.2V5.5V, 500nA supply, external crystal, alarm output, -40°C+85°C, Iq:0.5uA
  • Source: EasyEDA/JLC verified common component seed
  • Project designators: Not project-specific
  • Project quantity per board: Not project-specific

Capabilities

  • i2c: interface

Package And Footprint

  • Package / footprint name: SOP-8
  • Pin count: 8
  • EasyEDA symbol UUID: da58e03d7d1c4af596a812b71810b1f5
  • EasyEDA footprint UUID: 2d2c4b680c114d399fbd60672a881771
  • EasyEDA device UUID: 4e72d254feaf4a6cb9c2709f7c235f29
  • EasyEDA library UUID: 0819f05c4eef4c71ace90d822a990e87

Power And Operating Modes

  • Active current: EasyEDA property: 500nA.
  • Sleep / standby current: Not characterized in seed; extract sleep/standby current from datasheet tables.
  • Supply rails: EasyEDA property: 1.2V~5.5V.
  • Notes: Seed values are search hints only. Verify power modes, rail limits, startup requirements, and reference design passives from the datasheet.

Procurement Classification

  • JLC class: Extended Part
  • JLC note / assembly basis: EasyEDA/JLC verified common memory, timing, storage, and security seed
  • Assembly status: jlc_extended
  • Price-break table: Not captured in seed. Store only timestamped price-break snapshots when intentionally refreshed.
  • Live stock: intentionally not stored as durable selection data; refresh externally before ordering.

Datasheet And Links

Selection Notes

  • Good for: battery-backed timekeeping, scheduled wakeups, timestamped logs, and low-power systems that need wall-clock time
  • Avoid when: Not captured yet.
  • Known layout constraints: Verify package land pattern, decoupling requirements, thermal pad, RF keepouts, crystal routing, and boot straps from the datasheet.
  • Equivalent search hints: match category rtc, interfaces i2c, package SOP-8, and EasyEDA footprint UUID 2d2c4b680c114d399fbd60672a881771.

Search Keywords

seed:common-memory-timing-security, source:easyeda-bridge, iot, common-pcb, storage, timing, security, bm8563, real-time-clock, i2c, low-power, sop-8, rtc, jlc-extended, jlc_extended, jlc-note:easyeda-jlc-verified-common-memory-timing-storage-and-security-seed, power

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