74HC245KAJ

Identity

Manufacturer: FM(富满)
Model / MPN: 74HC245KAJ
LCSC: C19192982
Category: bus-transceiver
Description: 74HC245KAJ
Source: EasyEDA/JLC verified common component seed
Project designators: Not project-specific
Project quantity per board: Not project-specific

Capabilities

gpio: interface

Package And Footprint

Package / footprint name: TSSOP-20
Pin count: 20
EasyEDA symbol UUID: 275a71305494473088b57bf267c683c7
EasyEDA footprint UUID: 91fc5991e0a74a82ab525cc9f2487f9f
EasyEDA device UUID: 64948653a63d41a6865316974b0fc2a6
EasyEDA library UUID: 0819f05c4eef4c71ace90d822a990e87

Power And Operating Modes

Active current: Not characterized in seed; extract active current from datasheet tables.
Sleep / standby current: Not characterized in seed; extract sleep/standby current from datasheet tables.
Supply rails: Not characterized in seed; capture allowed supply rail range from datasheet.
Notes: Seed values are search hints only. Verify power modes, rail limits, startup requirements, and reference design passives from the datasheet.

Procurement Classification

JLC class: Extended Part
JLC note / assembly basis: EasyEDA/JLC verified common logic, level-shifting, bus-interface, and analog-switch seed
Assembly status: jlc_extended
Price-break table: Not captured in seed. Store only timestamped price-break snapshots when intentionally refreshed.
Live stock: intentionally not stored as durable selection data; refresh externally before ordering.

Datasheet And Links

Datasheet / product URL: https://atta.szlcsc.com/upload/public/pdf/source/20231116/FE00470B9356E6D4430EB785DA988E36.pdf
Product URL: https://atta.szlcsc.com/upload/public/pdf/source/20231116/FE00470B9356E6D4430EB785DA988E36.pdf
Datasheet-derived notes: Not extracted yet. Use PDF extraction to fill power modes, absolute maximums, pin functions, package variants, and reference design requirements.

Selection Notes

Good for: parallel bus direction control, external memory or display interfaces, and isolating expansion headers
Avoid when: Not captured yet.
Known layout constraints: Verify package land pattern, decoupling requirements, thermal pad, RF keepouts, crystal routing, and boot straps from the datasheet.
Equivalent search hints: match category bus-transceiver, interfaces gpio, package TSSOP-20, and EasyEDA footprint UUID 91fc5991e0a74a82ab525cc9f2487f9f.

Search Keywords

seed:common-logic-interface-glue, source:easyeda-bridge, iot, common-pcb, logic, interface, glue, 74hc245, octal-bus-transceiver, direction-pin, three-state, bus-transceiver, tssop-20, jlc-extended, gpio, jlc_extended, jlc-note:easyeda-jlc-verified-common-logic-level-shifting-bus-interface-and-analog-switch-seed