ATECC608B-MAVDA-S
Identity
- Manufacturer: MICROCHIP(美国微芯)
- Model / MPN: ATECC608B-MAVDA-S
- LCSC: C17350254
- Category: secure-element
- Description: ATECC608B-MAVDA-S 2V
5.5V 1-Wire;I2C Algorithm:ECDH;ECDSA;AES-128;SHA-256;HMAC Interface:1-Wire;I2C Standby Current (Max):150nA Voltage - Supply:2V5.5V Voltage - Supply:2V5.5V Operating Temperature:-40℃+100℃ Operating Temperature:-40℃~+100℃ - Source: EasyEDA/JLC verified common component seed
- Project designators: Not project-specific
- Project quantity per board: Not project-specific
Capabilities
- i2c: interface
- 1-wire: interface
Package And Footprint
- Package / footprint name: UDFN-8(2x3)
- Pin count: Unknown
- EasyEDA symbol UUID: a35a2ced1b02423cb1f6cd7d4ac443c8
- EasyEDA footprint UUID: 6dbb7ab4e35f496180d50090e5d3184a
- EasyEDA device UUID: 0cc34f1c8a024d23af72d473b787b111
- EasyEDA library UUID: 0819f05c4eef4c71ace90d822a990e87
Power And Operating Modes
- Active current: Not characterized in seed; extract active current from datasheet tables.
- Sleep / standby current: Not characterized in seed; extract sleep/standby current from datasheet tables.
- Supply rails: EasyEDA property: 2V~5.5V.
- Notes: Seed values are search hints only. Verify power modes, rail limits, startup requirements, and reference design passives from the datasheet.
Procurement Classification
- JLC class: Extended Part
- JLC note / assembly basis: EasyEDA/JLC verified common memory, timing, storage, and security seed
- Assembly status: jlc_extended
- Price-break table: Not captured in seed. Store only timestamped price-break snapshots when intentionally refreshed.
- Live stock: intentionally not stored as durable selection data; refresh externally before ordering.
Datasheet And Links
- Datasheet / product URL: https://item.szlcsc.com/datasheet/ATECC608B-MAVDA-S/18479418.html
- Product URL: https://item.szlcsc.com/datasheet/ATECC608B-MAVDA-S/18479418.html
- Datasheet-derived notes: Not extracted yet. Use PDF extraction to fill power modes, absolute maximums, pin functions, package variants, and reference design requirements.
Selection Notes
- Good for: device identity, secure boot support, anti-cloning, key storage, certificate authentication, and 1-Wire or I2C authenticators
- Avoid when: Not captured yet.
- Known layout constraints: Verify package land pattern, decoupling requirements, thermal pad, RF keepouts, crystal routing, and boot straps from the datasheet.
- Equivalent search hints: match category
secure-element, interfaces i2c, 1-wire, packageUDFN-8(2x3), and EasyEDA footprint UUID6dbb7ab4e35f496180d50090e5d3184a.
Search Keywords
seed:common-memory-timing-security, source:easyeda-bridge, iot, common-pcb, storage, timing, security, atecc608b, crypto-auth, secure-element, i2c, 1-wire, aes, udfn-8-2x3, jlc-extended, jlc_extended, jlc-note:easyeda-jlc-verified-common-memory-timing-storage-and-security-seed