RT9193-33GB
Identity
- Manufacturer: RICHTEK(立锜)
- Model / MPN: RT9193-33GB
- LCSC: C15651
- Category: ldo-regulator
- Description: 3.3V 300mA 5.5V 5.5V Output Configuration:Positive Voltage - Supply:5.5V Output Voltage:3.3V Output Voltage:3.3V Output Current:300mA Power Supply Rejection Ratio (PSRR):-50dB@(10kHz) Voltage Dropout:220mV@(300mA) standby current:90uA Noise:100uVrms Features:Enable control;Ov
- Source: EasyEDA/JLC verified common component seed
- Project designators: Not project-specific
- Project quantity per board: Not project-specific
Capabilities
- Not captured yet.
Package And Footprint
- Package / footprint name: SOT-23-5
- Pin count: 5
- EasyEDA symbol UUID: 48b8b059972a42f783de7b0007c00a2b
- EasyEDA footprint UUID: f2785a7a800f4327acd4dfdd25d8d5e3
- EasyEDA device UUID: 85955bc08ee146baaa04bdb82fe46a9a
- EasyEDA library UUID: 0819f05c4eef4c71ace90d822a990e87
Power And Operating Modes
- Active current: Not characterized in seed; extract active current from datasheet tables.
- Sleep / standby current: Not characterized in seed; extract sleep/standby current from datasheet tables.
- Supply rails: EasyEDA property: 5.5V.
- Notes: Seed values are search hints only. Verify power modes, rail limits, startup requirements, and reference design passives from the datasheet.
Procurement Classification
- JLC class: Extended Part
- JLC note / assembly basis: EasyEDA/JLC verified common power, analog, and interface IC seed
- Assembly status: jlc_extended
- Price-break table: Not captured in seed. Store only timestamped price-break snapshots when intentionally refreshed.
- Live stock: intentionally not stored as durable selection data; refresh externally before ordering.
Datasheet And Links
- Datasheet / product URL: https://item.szlcsc.com/datasheet/RT9193-33GB/16332.html
- Product URL: https://item.szlcsc.com/datasheet/RT9193-33GB/16332.html
- Datasheet-derived notes: Not extracted yet. Use PDF extraction to fill power modes, absolute maximums, pin functions, package variants, and reference design requirements.
Selection Notes
- Good for: power-tree designs when ratings and layout constraints fit
- Avoid when: Not captured yet.
- Known layout constraints: Verify package land pattern, decoupling requirements, thermal pad, RF keepouts, crystal routing, and boot straps from the datasheet.
- Equivalent search hints: match category
ldo-regulator, interfaces none captured, packageSOT-23-5, and EasyEDA footprint UUIDf2785a7a800f4327acd4dfdd25d8d5e3.
Search Keywords
seed:common-power-analog-interface, source:easyeda-bridge, iot, common-pcb, rt9193, 3.3v, 300ma, low-noise, enable, ldo-regulator, sot-23-5, jlc-extended, jlc_extended, jlc-note:easyeda-jlc-verified-common-power-analog-and-interface-ic-seed, power