SN74LVC2T45DCURG4

Identity

• Manufacturer: TI(德州仪器)
• Model / MPN: SN74LVC2T45DCURG4
• LCSC: C139382
• Category: level-shifter
• Description: SN74LVC2T45DCURG4 1.65V5.5V Input type:- output type:Tri-State Voltage - Supply:1.65V5.5V Voltage - Supply:1.65V~5.5V Number of Elements:1 Number of Bits per Element:2 Channel Type:Bidirectional Current - Output Low(IOL):32mA Current - Output High(IOH):32mA Logic Family:74LVC Opera
• Source: EasyEDA/JLC verified common component seed
• Project designators: Not project-specific
• Project quantity per board: Not project-specific

Capabilities

• gpio: interface

Package And Footprint

• Package / footprint name: VSSOP-8-0.5mm
• Pin count: Unknown
• EasyEDA symbol UUID: 675e2206b9334d71aaba787db0663611
• EasyEDA footprint UUID: 4e3d922f9ef14968add9c7a24c11b4b0
• EasyEDA device UUID: 33d69149811647b6ac672c9dd8cf73fe
• EasyEDA library UUID: 0819f05c4eef4c71ace90d822a990e87

Power And Operating Modes

• Active current: Not characterized in seed; extract active current from datasheet tables.
• Sleep / standby current: Not characterized in seed; extract sleep/standby current from datasheet tables.
• Supply rails: EasyEDA property: 1.65V~5.5V.
• Notes: Seed values are search hints only. Verify power modes, rail limits, startup requirements, and reference design passives from the datasheet.

Procurement Classification

• JLC class: Extended Part
• JLC note / assembly basis: EasyEDA/JLC verified common logic, level-shifting, bus-interface, and analog-switch seed
• Assembly status: jlc_extended
• Price-break table: Not captured in seed. Store only timestamped price-break snapshots when intentionally refreshed.
• Live stock: intentionally not stored as durable selection data; refresh externally before ordering.

Datasheet And Links

• Datasheet / product URL: https://www.ti.com/cn/lit/gpn/sn74lvc2t45
• Product URL: https://www.ti.com/cn/lit/gpn/sn74lvc2t45
• Datasheet-derived notes: Not extracted yet. Use PDF extraction to fill power modes, absolute maximums, pin functions, package variants, and reference design requirements.

Selection Notes

• Good for: reuse when package, electrical ratings, footprint, and assembly class match the project constraints
• Avoid when: Not captured yet.
• Known layout constraints: Verify package land pattern, decoupling requirements, thermal pad, RF keepouts, crystal routing, and boot straps from the datasheet.
• Equivalent search hints: match category level-shifter, interfaces gpio, package VSSOP-8-0.5mm, and EasyEDA footprint UUID 4e3d922f9ef14968add9c7a24c11b4b0.

Search Keywords

seed:common-logic-interface-glue, source:easyeda-bridge, iot, common-pcb, logic, interface, glue, sn74lvc2t45, 2-bit, direction-pin, dual-supply, voltage-translation, level-shifter, vssop-8-0.5mm, jlc-extended, gpio, jlc_extended, jlc-note:easyeda-jlc-verified-common-logic-level-shifting-bus-interface-and-analog-switch-seed