SRV05-4
Identity
- Manufacturer: Unknown
- Model / MPN: SRV05-4
- LCSC: C127538
- Category: esd-array
- Description: SRV05-4 TVS Reverse Stand-Off Voltage (Vrwm):5V@Max Maximum Clamping Voltage:12.5V Peak Pulse Current (Ipp)@10/1000us:12A@8/20us Breakdown Voltage:6V Type:TVS
- Source: EasyEDA/JLC verified common component seed
- Project designators: Not project-specific
- Project quantity per board: Not project-specific
Capabilities
- usb: interface
- gpio: interface
Package And Footprint
- Package / footprint name: SOT-23-6
- Pin count: 6
- EasyEDA symbol UUID: 89e51e60c8ba490784600ea0a00c64d2
- EasyEDA footprint UUID: ebc5370dc87d4461ad5320a48450ab14
- EasyEDA device UUID: 7d282a42a34a489783b19541d296ef16
- EasyEDA library UUID: 0819f05c4eef4c71ace90d822a990e87
Power And Operating Modes
- Active current: Passive part; no quiescent current.
- Sleep / standby current: Passive part; no quiescent current.
- Supply rails: Application-defined.
- Notes: Ratings are seeded from EasyEDA/LCSC properties when present; verify against datasheet for final design.
Procurement Classification
- JLC class: Extended Part
- JLC note / assembly basis: EasyEDA/JLC verified common board support, timing, EMI, and protection seed
- Assembly status: jlc_extended
- Price-break table: Not captured in seed. Store only timestamped price-break snapshots when intentionally refreshed.
- Live stock: intentionally not stored as durable selection data; refresh externally before ordering.
Datasheet And Links
- Datasheet / product URL: https://atta.szlcsc.com/upload/public/pdf/source/20170914/C127538_1505374068178969057.pdf
- Product URL: https://atta.szlcsc.com/upload/public/pdf/source/20170914/C127538_1505374068178969057.pdf
- Datasheet-derived notes: Not extracted yet. Use PDF extraction to fill power modes, absolute maximums, pin functions, package variants, and reference design requirements.
Selection Notes
- Good for: reuse when package, electrical ratings, footprint, and assembly class match the project constraints
- Avoid when: Not captured yet.
- Known layout constraints: Verify package land pattern, decoupling requirements, thermal pad, RF keepouts, crystal routing, and boot straps from the datasheet.
- Equivalent search hints: match category
esd-array, interfaces usb, gpio, packageSOT-23-6, and EasyEDA footprint UUIDebc5370dc87d4461ad5320a48450ab14.
Search Keywords
seed:common-board-support-protection, source:easyeda-bridge, iot, common-pcb, srv05-4, 5v, 4-line, sot-23-6, usb, gpio-protection, esd-array, jlc-extended, gpio, jlc_extended, jlc-note:easyeda-jlc-verified-common-board-support-timing-emi-and-protection-seed